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Back to the future
Eye-popping products are on the horizon, as new semiconductor materials
prepare to mix it up with silicon
By Stephen Lawton
Electronic paper. Sure. Flexible computer screens. Sounds good. Internet-enabled
cereal boxes. Say what? These are just a few of the devices that could
hit the market in years-rather than decades-as some of the world's largest
chip companies develop new semiconductor materials to enhance or replace
silicon.
But as eye-popping, and in some cases mind-boggling, as these products
are, they're not the only driving force behind cutting-edge materials
R&D. In some cases, they're more like desirable byproducts of the drive
to keep up with Moore's Law in an economically feasible way.
Existing silicon-based technology likely will reach the limits of our
ability to build smaller and faster chips in 10 to 20 years, warn scientists
and industry analysts. Potential limitations of silicon chips include
heat dissipation, power consumption and signal noise from current bleeding
through the ultrathin insulation layers of transistors. Simply put, when
you challenge the laws of physics, physics will win.
That's why nanotechnology, plastic semiconductors and hybrid chips-created
by marrying silicon with a compound material such as gallium arsenide-are
poised to capture a share of what has been silicon's domain. How much
of a share is still open to speculation by industry analysts. Such chips
generally are easier and less expensive to manufacture, require less power
and perform well enough to displace-and in some cases, replace-silicon
chips, manufacturers say. Plus, they promise, these chips will be fully
compatible with existing technologies.
As semiconductors become more integrated, the greater number of transistors
requires more power, and that translates into more heat. Helping chips
keep their cool and maintaining low power levels while increasing speed
and integration are the technological barriers chip makers will face during
this decade, says Intel Corp.'s Gerald Marcyk, director of components
research at Intel Labs in Santa Clara, CA: "Smaller and faster just isn't
good enough anymore."
Still, Intel isn't exactly tracking the rest of the industry in its pursuit
of next-generation chips. Instead, the semiconductor behemoth is using
a new transistor design to further integrate circuits using existing silicon
technology (see sidebar, below).
Like any good corporate gambler, however, Intel is hedging its bets, developing
technology that allows silicon to serve as a substrate to other materials-an
approach that's being duplicated by other chip companies as a way of leveraging
existing technology while exploiting advanced new materials.
The hybrid approach
The use of compound materials isn't new. These inorganic materials, which
include gallium arsenide (GaAs), silicon germanium (SiGa), indium phosphide
(InP) and gallium nitride (GaN), offer capabilities that silicon alone
can't provide, such as the ability to transmit light.
While they can offer exceptional performance, chips built exclusively
from compound materials tend to be more expensive and more brittle than
silicon. Indium phosphide, for example, "will crack if you look at it
the wrong way," says Bill Ooms, vice president and director of material
devices and energy research at Motorola Labs in Tempe, AZ. As a result,
use of these materials has been limited to niche applications.
But all that could change with the impending introduction of hybrid chips,
which marry silicon with another material, or compound. For example, growing
a gallium arsenide crystal on top of a silicon base creates a chip that
has higher performance than silicon, plus the ability to transmit light.
Another method of building a hybrid chip is to incorporate nanotechnology
on top of silicon. In each case, building on a silicon substrate means
that the new chips would be compatible with existing CMOS technology and
wouldn't require special conversion technology to be used with existing
semiconductors.
Motorola Inc., Schaumburg, IL, last year announced it had successfully
grown a compound material-a gallium arsenide crystal-on top of silicon.
At the time, Motorola's Senior Vice President and Chief Technology Officer
Dennis Roberson compared the scope of the accomplishment to the transition
from discrete semiconductors to integrated circuits.
The challenge to growing a gallium arsenide crystal on silicon is that
the two materials inherently are incompatible at the atomic level, says
Motorola's Ooms. Motorola was able to overcome this by adding a "bonding"
layer-in this case a single crystal of strontium titanate the size of
the silicon substrate-between the silicon and gallium arsenide layers.
This layer closely matches the molecular properties of the silicon, but
is flexible enough to expand and match the atomic density of the gallium
arsenide, he says.
While inorganic compounds may offer greater performance, the economics
to replace silicon on a wide scale simply don't exist, save for some specific
applications, Ooms says. Wafers made exclusively from these materials
are rather small-typically 4 inches to 6 inches in diameter, but sometimes
smaller-expensive to manufacture and not economical to build in small
lots, he notes. An indium phosphide wafer, for example, is only 3 inches
wide and costs $1,200 to manufacture, he says. Silicon wafers, by contrast,
cost pennies for an 8-inch wafer. Hybrid chips will be more expensive
than silicon wafers, Ooms says, but they should be significantly less
expensive than a pure gallium arsenide or indium phosphide wafer. Hybrids
also should provide higher yields because they use 8-inch wafers and are
expected to have fewer damaged wafers than pure compound material chips.
By combining traditional CMOS with gallium arsenide, Ooms believes Motorola
will be able to build faster radio frequency chips that will be cost-competitive
with silicon alone. Motorola has licensed the gallium arsenide-on-silicon
technology to IQE Ltd. of Cardiff, Wales, for cell phone applications.
Ooms anticipates the first engineering prototypes to be released in the
second quarter of this year.
Theoretically, Ooms adds, combining indium phosphide with silicon should
allow Motorola to build better collision-avoidance radar using its improved
infrared capabilities, while gallium nitride on silicon could be used
for blue lasers for storage applications. But these two hybrid chips have
yet to reach even the design stage, so he has no estimate of when commercial
implementation could begin.
One word: plastics
One of the more exotic approaches to chip manufacturing today is the use
of organic thin-film transistors (OTFTs). Also called plastic semiconductors,
they're "manufactured" by printing the chip directly onto a thin film,
using inkjet printers. The film then is bonded to a substrate that can
be rigid or flexible; as a result, the semiconductor itself can be rigid
or flexible. Another benefit: light-emitting properties that allow OTFTs
to be used for some applications not possible with silicon.
(One might think that calling the same chip both "organic" and "plastic"
is contradictory. It's not. OTFTs are built using polymers that can be
processed as liquids and deposited on a substrate to make a semiconductor.
A polymer, by definition, is an organic material due to its molecular
makeup; thus, plastic semiconductors are organic.)
John Rogers, director of nanotechnology research at Lucent Technologies
Inc.'s Bell Labs, characterizes plastic semiconductors as a "most disruptive
technology" that potentially could replace the world's No. 1 reflective
display technology used today: paper.
"Electronic paper is right around the corner," Rogers says, predicting
that in five to 10 years, we'll have commercial enabling technology to
build a display as thin, flexible and light as paper with color pixels
that can change dynamically from on to off. By connecting a wireless adapter
to the electronic paper, he says, the unit could access the Internet and
change the images being shown.
In the movie Back to the Future II, a futuristic video wall changes from
displaying an outdoor scene to becoming a large-screen videophone. Rogers
predicts that such a wall, made up of multiple sheets of plastic semiconductors
used as a display, could be available sooner than 2015-the year in which
the movie was set.
Among the potential commercial applications for electronic paper are computer
and advertising displays, labels and smart bar codes. In fact, Rogers
says, "Plastic circuits could revolutionize big segments of consumer devices."
It's conceivable that we could see bumper stickers that change messages
or cereal boxes that connect to the Internet and provide personalized
content based on the breakfast-eater's preference, he notes.
Lucent's partner in its electronic paper endeavor, E Ink Corp. of Cambridge,
MA, currently laminates its monochrome electronic display to a rigid substrate.
Next year, says Michael McCreary, E Ink's vice president of R&D, the display
will be manufactured on a flexible film coming off large rollers and laminated
to a glass substrate. By 2004, the company will laminate a full-color
display to a flexible substrate, which could be the basis for a flexible
computer monitor, or a video screen that conceivably would wrap around
a pole for 360-degree viewing, he projects.
Once an image is created using E Ink's technology today, no additional
power is required to maintain the image. Power is only required to change
a pixel from on to off-black to white. Advertising displays will be able
to run for months on two AA batteries, he anticipates.
IBM Corp., Armonk, NY, also sees advances for lightweight, flexible and
rugged displays. Christos Dimitrakopoulos, organic electronics researcher
at IBM, says he expects to see wearable displays and computers within
five years.
Manufacturability is key, McCreary notes. Semiconductor vendors will be
able to create the next generation of OTFTs using much of today's silicon
manufacturing technology, but it will be easier, cheaper and require less
complex manufacturing lines, he says.
Manufacture of silicon semiconductors requires a clean room, the use of
toxic chemicals and extremely high heat. It requires costly photolithography
steps or vacuum deposition-both of which can be eliminated with plastic
semiconductors, says Tracey Stephens, marketing manager and co-founder
of Plastic Logic Ltd. of Cambridge, England.
Plastic semiconductors can be inkjet printed outside a clean room at room
temperature and require less manufacturing equipment, Dimitrakopoulos
adds. Existing manufacturing lines could be used, so manufacturers won't
need to build costly new fabs. Additionally, the technology should result
in higher yields, Stephens and Dimitrakopoulos agree.
"Since we are inkjet-printing circuits," Stephens notes, "lower batch
sizes are much more economical than with conventional silicon." Stephens
sees additional applications for inkjet-printed circuits in electronic
labels, disposable electronics and "novel packaging." She anticipates
shipping commercial versions of the circuits next year.
The technology is application agnostic, says Dan Gamota, department manager
for Printing Organic Electronics at Motorola; it could replace both digital
and analog silicon chips, depending on the application. However, these
circuits can't replace microprocessors that require much higher performance.
Nanotech: The Next Generation
The silicon squeeze is on, with plastic chips at the low end and nanotechnology
targeting high-performance applications. Hewlett-Packard Co., Palo Alto,
CA, is one of the champions of the nanotechnology-on-silicon hybrid semiconductors.
HP, in conjunction with UCLA, Westwood, CA, recently patented a grid design
for a one-atom-high chip. Functioning like a field-programmable gate array
(FPGA), the chip can be programmed electrically and is more tolerant of
defects than traditional silicon, says Philip Kuekes, a computer architect
in the Quantum Science Research department at HP Laboratories. If a defect
on the nanochip is encountered, the engineer simply reroutes the circuit's
signals to bypass the problem. Not only are these circuits smaller than
those in traditional silicon, but a single molecule of a nanochip could
replace six or seven transistors in a silicon chip, he says.
Kuekes expects memory chips using the grid design to be available by 2005,
and other chips using the nanochip-on-silicon design to reach the market
by 2007.
As with organic chips, nanochips are less expensive to build than silicon
chips, Kuekes says. The equipment for manufacturing semiconductors at
the quantum level is less expensive because, in part, a nanochip can be
built at room temperature, doesn't need the same level of clean room and
current manufacturing lines can be used. Again, some modifications of
equipment would be required, but it would be far less expensive to modify
an existing fab than to build a new fab to make silicon chips, he says.
Nanochips also require very little power to switch a microcircuit, so
these chips will meet the low power requirement, Kuekes adds.
HP isn't the only company bullish on nanotechnology for memory chips.
Nantero Inc., Woburn, MA, is using carbon nanotubes to create a new type
of memory chip transistor that the company says will carry it through
the rest of the decade. The memory is expected to be compatible with today's
CMOS chips and could be manufactured in today's fabrication facilities.
He expects to have commercial prototypes in one to two years.
Unlike HP's technology, in which semiconductors are built using a layer
of active material just one atom high, Nantero's nanotubes could range
from a few nanometers to as much as a micron, says CEO Greg Schmergel.
Nantero's approach differs significantly from other technological advances;
it might be considered a throwback to computer equipment of decades ago.
The company uses an electromechanical design, meaning that the nanotubes
must physically move and touch to switch from a zero to a one. However,
Schmergel says, the nanotubes, which have walls one atom thick, are "many
times stronger than steel-as strong as a diamond-a better conductor [of
electrical signals] than copper, and [they're] flexible."
Schmergel says the technology virtually could eliminate a computer's boot
time. Because carbon nanotubes are nonvolatile, computers could boot instantly,
regardless of the operating system, he says.
Carbon nanotube chips also would have significantly higher storage density
than existing memory chips, he claims; whereas today's DRAM stick might
offer 512MB of memory, carbon nanotubes could provide many gigabytes of
memory in that same physical space. And if the technology were packaged
to fit in the same space as a 5.25-inch disk drive, the user conceivably
could obtain as much storage capacity as in a large array of disks, he
argues.
Still, it's not likely that the memory industry will be dominated by carbon
nanotubes in the future, says Steve Cullen, director and principal analyst
for semiconductor research at Scottsdale, AZ-based Reed In-Stat Group,
which is owned by Reed Elsevier Plc, ELECTRONIC BUSINESS ' parent company.
For any new memory technology to succeed, he says, the manufacturer will
have to create a chip that is extremely inexpensive to build. As prices
continue to fall and capacities increase, memory has become a loss leader
for some companies, he notes. A pure memory chip company could have a
hard time making a profit in that kind of market.
Undaunted, Schmergel notes that every 1% of the memory market captured
by Nantero chips would translate to $250 million, based on In-Stat's estimate
of $25 billion in worldwide memory revenue in 2001.
Despite advances in nanotechnology, plastic semiconductors and hybrid
chips, analysts and chipmakers alike see no end to the dominance of silicon
for the next five to 10 years. Silicon still is inexpensive to manufacture,
and a lot of companies have experience in silicon semiconductors, notes
Elliot Grant, an engagement manager at McKinsey & Co., a San Francisco-based
management consultancy. But while silicon semiconductors in general are
safe, technologies like OTFTs "can be category killers within two years,"
he says.
Meanwhile, scientists at HP, IBM, Lucent and other companies agree that
silicon is about to feel pressure from emerging technologies and materials
in vertical markets. At least in the storage business, Schmergel says,
carbon nanotubes could be a very disruptive technology within two years.
"There are no significant physics issues to hold back production," he
says. "The laws of physics are on our side."
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Intel plays silicon
card
It might be hard to picture Intel as a contrarian. But while some
chip makers look to organic compound materials or nanotechnology
to take their chips to the next level, scientists at this PC industry
monolith are focusing on new designs to squeeze more life out of
silicon technologies.
The company's goal is to build microprocessors that have 25 times
the number of transistors as today's Pentium 4, with 10 times the
speed and no increase in power consumption, all by the end of the
decade. To put that in perspective, today's Pentium 4 has approximately
42 million transistors, the next generation Itanium processor will
have 220 million transistors-and Intel believes it can build a silicon
processor that can scale up to 1 billion transistors.
As for speed, Intel expects to be able to deliver what Star Trek
only promises-real-time speech recognition and translation, as well
as graphics-intensive programs and proactive computing, says Gerald
Marcyk, director of Intel's Components Research Lab in Santa Clara,
CA.
To achieve this goal, Marcyk says, Intel developed 15-nanometer
transistors that can operate in the terahertz range. But first,
Intel had to overcome the barriers of heat, power and electron drift
by redesigning the most basic component in the semiconductor: the
transistor.
These new, low-power transistors, which should be available in five
years, will operate at approximately 0.75 volts, according to Intel's
Web site. Today's "low-power" chips need 1.3 volts, almost twice
the power.
Exotic technologies aren't necessarily required to maintain the
technology advances in Moore's Law, maintains Marcyk, but then,
he doesn't rule them out either. "Moore's Law is about economics,"
he says, "not science." Chips today are very different from those
of 1965, he notes, and those of 2010 might well use new technologies
that are not solely silicon. As the economics of semiconductor manufacturing
and design change, so might the semiconductors themselves. Moore's
Law "will be extended by new materials and new structures."
Intel is addressing the power problem associated with highly integrated
chips by making chips that can run on lower voltage per transistor.
Lower voltage means less heat and less power, but since the new
chips have many more transistors than existing chips, the result
is a wash-essentially, the chips use the same amount of power and
create the same amount of heat as today's chips do, even though
they're more complex.
-S.L
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U-R-Linked
E Ink Corp.
http://www.eink.com
Hewlett-Packard Labs
http://www.hpl.hp.com/index.html
IBM Journal of Research and Development, January 2001
http://www.research.ibm.com/journal/rd45-1.html
IBM Microelectronics
http://www-3.ibm.com/chips/index.html
Intel Labs
http://www.intel.com/labs/index.htm?iid=Homepage+About_Labs&
Motorola Inc.
http://www.motorola.com
Nantero Inc.
http://www.nantero.com
Plastic Logic Ltd.
http://www.plasticlogic.co.uk
Semiconductors Information Web site
http://www.semiconductors.co.uk
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